Dev Builds » 20260703-1829

Use this dev build

NCM plays each Stockfish dev build 20,000 times against Stockfish 15. This yields an approximate Elo difference and establishes confidence in the strength of the dev builds.

Summary

Host Duration Avg Base NPS Games WLD Standard Elo Ptnml(0-2) Gamepair Elo
ncm-dbt-01 06:49:02 577084 4010 1811 312 1887 +136.49 ± 4.35 0 22 494 1457 32 +323.92 ± 15.32
ncm-dbt-02 06:49:59 578280 4014 1802 317 1895 +134.93 ± 4.32 0 14 528 1431 34 +317.5 ± 14.76
ncm-dbt-03 06:47:39 578349 3988 1806 280 1902 +140.07 ± 4.27 0 16 469 1476 33 +337.05 ± 15.71
ncm-dbt-04 06:48:02 561506 4002 1806 334 1862 +134.07 ± 4.44 0 22 523 1418 38 +312.94 ± 14.87
ncm-dbt-05 06:47:01 582473 3986 1769 315 1902 +132.85 ± 4.43 0 26 517 1420 30 +311.41 ± 14.97
20000 8994 1558 9448 +135.68 ± 1.95 0 100 2531 7202 167 +320.38 ± 6.75

Test Detail

ID Host Base NPS Games WLD Standard Elo Ptnml(0-2) Gamepair Elo CLI PGN
476820 ncm-dbt-02 586731 34 17 2 15 +164.53 ± 33.31 0 0 2 15 0 +481.47 ± 438.97
476819 ncm-dbt-03 585674 40 20 4 16 +147.16 ± 36.51 0 0 4 16 0 +381.61 ± 253.34
476818 ncm-dbt-05 583740 60 26 5 29 +126.96 ± 37.48 0 1 7 22 0 +301.33 ± 147.36
476817 ncm-dbt-01 581818 76 35 5 36 +145.0 ± 26.77 0 0 8 30 0 +371.72 ± 137.35
476816 ncm-dbt-04 566928 80 35 9 36 +117.15 ± 28.81 0 0 14 26 0 +269.34 ± 93.87
476815 ncm-dbt-02 588174 500 216 40 244 +127.76 ± 12.26 0 3 70 175 2 +298.62 ± 41.01
476814 ncm-dbt-03 586223 500 226 36 238 +138.99 ± 11.88 0 0 65 180 5 +330.23 ± 42.3
476813 ncm-dbt-05 580282 500 227 41 232 +135.76 ± 12.42 0 4 59 184 3 +324.17 ± 44.97
476812 ncm-dbt-04 567403 500 228 45 227 +133.34 ± 13.26 0 5 63 176 6 +306.84 ± 43.45
476811 ncm-dbt-01 581693 500 226 39 235 +136.56 ± 12.39 0 3 61 182 4 +324.17 ± 44.15
476810 ncm-dbt-02 591814 500 220 42 238 +129.35 ± 13.17 0 7 61 179 3 +301.33 ± 44.13
476809 ncm-dbt-03 586308 500 224 33 243 +139.81 ± 11.84 0 2 58 187 3 +339.63 ± 45.29
476808 ncm-dbt-05 584327 500 216 31 253 +134.95 ± 12.64 0 5 58 184 3 +321.19 ± 45.36
476807 ncm-dbt-04 567126 500 231 41 228 +138.99 ± 12.5 0 3 59 183 5 +330.23 ± 44.94
476806 ncm-dbt-01 583489 500 228 39 233 +138.18 ± 12.33 0 2 62 181 5 +327.18 ± 43.69
476805 ncm-dbt-02 591082 500 226 35 239 +139.8 ± 11.18 0 0 61 187 2 +342.85 ± 43.79
476804 ncm-dbt-03 584285 500 230 29 241 +148.02 ± 11.65 0 3 46 198 3 +374.11 ± 51.25
476803 ncm-dbt-05 584748 500 216 36 248 +130.94 ± 12.56 0 3 68 175 4 +304.07 ± 41.65
476802 ncm-dbt-04 566020 500 228 43 229 +134.95 ± 12.64 0 3 64 178 5 +315.35 ± 43.03
476801 ncm-dbt-01 584117 500 219 36 245 +133.34 ± 12.49 0 5 59 184 2 +318.25 ± 44.96
476800 ncm-dbt-02 593196 500 229 39 232 +138.99 ± 12.7 0 2 63 178 7 +324.17 ± 43.32
476799 ncm-dbt-03 585000 500 221 41 238 +130.94 ± 12.17 0 3 66 179 2 +309.64 ± 42.33
476798 ncm-dbt-05 610754 500 219 42 239 +128.55 ± 12.43 0 4 67 177 2 +301.33 ± 42.04
476797 ncm-dbt-04 567482 500 222 45 233 +128.55 ± 12.24 0 2 72 173 3 +298.62 ± 40.29
476796 ncm-dbt-01 584916 500 220 45 235 +126.97 ± 12.85 0 5 68 174 3 +293.29 ± 41.75
476795 ncm-dbt-02 537007 500 227 38 235 +138.18 ± 12.33 0 0 68 175 7 +321.18 ± 41.27
476794 ncm-dbt-05 531669 500 225 43 232 +132.54 ± 12.52 0 3 66 177 4 +309.64 ± 42.33
476793 ncm-dbt-03 519572 500 223 25 252 +145.54 ± 11.79 0 2 52 192 4 +359.68 ± 48.01
476790 ncm-dbt-04 518115 500 223 41 236 +132.54 ± 12.32 0 2 68 176 4 +309.64 ± 41.56
476787 ncm-dbt-01 524635 500 227 31 242 +143.89 ± 11.87 0 1 57 187 5 +349.43 ± 45.6
476786 ncm-dbt-02 523352 26 12 1 13 +156.79 ± 41.95 0 0 2 11 0 +431.5 ± 465.32
476785 ncm-dbt-04 566257 422 186 38 198 +127.25 ± 14.05 0 5 55 149 2 +295.9 ± 46.58
476784 ncm-dbt-05 585126 426 190 35 201 +132.48 ± 13.06 0 1 59 150 3 +310.79 ± 44.57
476783 ncm-dbt-01 582235 434 199 29 206 +143.77 ± 13.73 0 4 44 164 5 +346.42 ± 52.35
476782 ncm-dbt-03 584579 448 213 34 201 +147.0 ± 12.54 0 1 48 170 5 +360.37 ± 49.93
476781 ncm-dbt-02 590782 454 212 35 207 +143.02 ± 12.88 0 0 57 163 7 +337.16 ± 45.31
476780 ncm-dbt-04 565076 500 230 35 235 +143.07 ± 13.15 0 1 64 174 11 +327.18 ± 42.83
476779 ncm-dbt-01 583321 500 234 48 218 +135.75 ± 11.36 0 0 66 182 2 +327.17 ± 41.95
476778 ncm-dbt-05 584411 500 222 41 237 +131.74 ± 12.93 0 5 63 178 4 +306.84 ± 43.45
476777 ncm-dbt-03 586139 500 224 32 244 +140.62 ± 12.23 0 3 56 187 4 +339.63 ± 46.2
476776 ncm-dbt-02 590481 500 224 54 222 +123.02 ± 12.74 0 2 81 162 5 +275.45 ± 37.75
476775 ncm-dbt-04 569151 500 223 37 240 +135.76 ± 11.58 0 1 64 183 2 +327.18 ± 42.83
476774 ncm-dbt-01 587537 500 223 40 237 +133.34 ± 12.69 0 2 69 173 6 +306.84 ± 41.23
476773 ncm-dbt-05 597205 500 228 41 231 +136.56 ± 12.39 0 0 70 173 7 +315.34 ± 40.62
476772 ncm-dbt-03 587367 500 225 46 229 +130.14 ± 12.97 0 2 74 167 7 +293.29 ± 39.69
476771 ncm-dbt-02 590181 500 219 31 250 +137.37 ± 11.07 0 0 63 186 1 +336.45 ± 43.03

Commit

Commit ID d5bbc6b67d3184fc39fa87a18596e77e92af990c
Author anematode
Date 2026-07-03 18:29:50 UTC
[RfC] RISC-V port and universal binary Performance on Spacemit K3, thanks @edolnx for testing master: Total time (ms) : 65200 Nodes searched : 3493826 Nodes/second : 53586 riscv-scalable-port: Total time (ms) : 15834 Nodes searched : 3493826 Nodes/second : 220653 Also thanks to @camel-cdr for guidance on RVV programming, and https://cloud-v.co for supplying an RVV instance to test with passed STC: LLR: 2.81 (-2.94,2.94) <0.00,2.00> Total: 1152 W: 527 L: 108 D: 517 Ptnml(0-2): 0, 17, 167, 348, 44 https://tests.stockfishchess.org/tests/view/6a39895b3036e45021aeb368 ## Summary We've had a `riscv64` target for a while, but haven't really optimized for it, in particular the vector extension (RVV). RVV, like SVE, is based on a scalable vector system where the vector length ranges from 128 to 65536. In practice implementations are between 128 and 2048, and 256 bits is quite common (e.g. the Spacemit K3 system above). Unfortunately this doesn't fit well into the rest of our code which assumes a fixed vector length, so what I've done is bypass the `VECTOR` ifdef (which now basically means "FIXED_LENGTH_VECTOR") and just have RVV-specific paths. The ability to explicitly control `vl` makes the code quite readable, in my opinion. We use LMUL>1 in most places to take advantage of multi-vector instructions. Generally the LMULs were chosen to best support a 256-bit vlen, which is very common, but by virtue of how the vlen control works, the code works with any vlen. In a couple places, i.e., `get_changed_pieces` and `AffineTransformSparseInput::propagate`, we have separate implementations depending on the vlen, because the optimal LMUL varies a lot between implementations. One little wrinkle is that `load_as` is compiled to a sequence of byte loads, because although unaligned loads are legal in RVA23, the spec says that they *may* be extremely slow (even though they usually aren't, in actual hw), so compilers are conservative. Thus I aligned the relevant buffers and made the semantics of `load_as` that the operand is aligned, by adding a runtime assertion. ### Universal binary Adding a universal binary is pretty easy and we can just cross-compile. There are two targets: baseline rv64gc and riscv64-rva23, which is actually a smaller subset of RVA23 that also works on some older processors that don't support the full thing. We use clang because GCC, until recently, has a nasty bug with LTO and RVV. Like the universal ARM and x86 builds, we check all the builds in CI. In this case we run bench with multiple vlens, 128 through 1024. In the meantime I deleted the existing broken and unused riscv64 tests. ### Follow-ups - Optimizations - zvdot4a8i path closes https://github.com/official-stockfish/Stockfish/pull/6920 No functional change
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